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TS-900 Series

Semiconductor Test System

  • Integrated semiconductor test platform – open architecture
  • 20 slot 3U PXI chassis offers up to 512, digital I/O channels with PMU and timing per pin capability
  • Application ready system offers a cost effective solution for digital and mixed-signal test applications
  • Includes ICEasy test software tools – simplifying test creation and device characterization
  • Multiple configurations – bench top, integrated cart, and integrated manipulator
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TS-900 Series Specifications

Mainframe Electrical and Mechanical
Chassis 20 slot, high power 3U PXI chassis
Smart Chassis Features
  • Temperature monitoring per slot
  • System power supply voltage monitoring
  • Fan monitoring and control
  • PXI trigger mapping

All features are accessible via a UI and API

PXI Triggers Slots: 2 – 20
Number: 8 per segment
Software controlled segment mapping supports:

  • Isolate a trigger line within a segment
  • Map a trigger line left to right
  • Map a trigger line right to left
PXI 10 MHz Integrated 10 MHz PXI clock with an auto-detect function. Presence of an external 10 MHz clock (from external input of timing slot) will disable the internal clock.
Accuracy: ±100 ppm
External 10 MHz Input An external 10 MHz clock source (TTL level) can be provided via a rear panel BNC or via a PXI System Timing Controller
10 MHz Output 10 MHz output is available via a rear panel BNC connector, TTL compatible level.
Cooling (4) 100 CFM fans
PXI System Power +5 V @ 94 A
+3.3 V @ 169 A
+12 V @ 10 A
-12 V @ 5 A
System CPU (Embedded) Core 2 Duo, 1.5 GHz, single slot controller
4 GB of RAM
System Hard Disk 320 GB
CPU Interfaces Front panel:

  • (2) USB

Rear panel:

  • 10 / 100-Base T, VGA, USB
UUT Interface Modular, pogo-pin interface
Supports up to 14 module blocks for digital, power, analog or RF applications
Block connector interfaces:

  • 68 pin VHDC
  • 78 pin D-sub
  • 25 pin D-sub
  • SMA
Input Power 120 VAC, ±15%
20 A (PFC)
240 VAC, ±10%
10 A (PFC)
47 – 440 Hz

 

Dynamic Digital I/O Subsystem
Number of Digital I/O and PMU Channels 64 (base configuration)
Maximum Configuration 512 channels
Maximum Clock Rate 100 MHz
Digital Test Modes Stimulus / response
Real-time compare
Vector Memory 64 Mb / channel
Real Time Compare Record Memory 1,024 (records data and program steps)
Drive Voltage Range -2 V to +7 V, Drive Hi & Drive Lo, maximum swing is 8 V
Sense Voltage Range -2 V to +7 V, Sense Hi & Sense Lo
Programmable Pull-Up / Pull-Down Current Source / Sink ±24 mA, programmable on a per channel basis,
V commutate range: -2 V to +7 V, programmable on a per channel basis
Parametric Measurement Units One per digital channel, plus (4) auxiliary PMUs per card
PMU Modes Force current, measure voltage
Force voltage, measure current
Force Voltage Range -1.5 V to +7 V
Force Voltage Accuracy ±20 mV
Force Voltage Resolution 16 bits
Force Current Ranges ±32 mA, ±8 mA, ±2 mA, ±512 uA, ±128 uA, ±32 uA, ±8 uA, ±2 uA FS
Force Current Accuracy:
Compliance Range:
+1.75V to +7V @ 32 mA
-1.5V to +7V @ no load
±120 uA, 32 mA range
±40 uA, 8 mA range
±5 uA, 2 mA range
±1.2 uA, 512 uA range
±600 nA, 128 uA range
±160 nA, 32 uA range
±80 nA, 8 uA range
±20 nA, 2 uA range
Current Measurement Accuracy (60 Measurements / Sec)
Compliance Range:
+1.75V to +7V @ 32 mA
-1.5V to +7V @ no load
±120 uA, 32 mA range
±40 uA, 8 mA range
±5 uA, 2 mA range
±1.2 uA, 512 uA range
±600 nA, 128 uA range
±160 nA, 32 uA range
±80 nA, 8 uA range
±20 nA, 2 uA range
Measure Voltage Range -2 V to +7 V
Measure Voltage Accuracy ±1 mV (measurement rate < 200 measurements / sec)
High and Low Commutation Voltage Range VCLo: -2 V to +5 V
VCHi: 0 V to +7 V
Voltage Clamp Accuracy ±100 mV
Static Digital Instrument
Number of Static Digital I/O Channels 64, expandable to 128
48 Input/Output ( programmable I/O in groups of eight)
16 inputs for fixture ID
Logic Levels LVTTL compatible
Source / Sink Current 24 mA (max)
User Power Option
Configuration Single channel, floating output with remote sense
Programmable Voltage Range 0 to 48 V
Output Voltage Accuracy ±0.2%, ±25 mV
Output Noise 1.5 mVRMS, 6 mVPP, full load. Measurement BW 1 MHz
Output Current 2 A @ 20 V, 0.8 A @ 48 V
Current Limit Range 0 to 2 A, 34 µA resolution
Current Readback Accuracy ±0.2% of reading, ±5 mA
Voltage Readback Accuracy ±0.1% of reading, ±10 mV
Remote Sense Voltage Difference Up to 0.25 V for each connection
4 channel Source / Measure Unit (SMU) User Power
Configuration 4-channel, 4 quadrant operation, isolated outputs, common ground, with remote sense
Programmable Voltage Range 0 to ±20V
Output Voltage Accuracy ±0.05% of programmed value + 2 mV
Output Noise < 20 mV p-p, 20 MHz BW, full load
Output Current ±2.5 uA to ±250 mA in decade ranges
Output Current Accuracy ±0.05% of programmed value + 0.05% of FS
Voltage Measurement Accuracy ±0.05% of programmed value + 2 mV
Current Measurement Accuracy Ranges: 250 nA to 250 mA in decades
Accuracy: ±0.05% of reading + 0.05% of FS
Measurement Resolution Programmable, 18 to 24 bits
Environmental
Operating Temperature 0 °C to +50 °C
Storage Temperature -20 °C to +60 °C
Relative Humidity
(Non-Condensing)
90%
Altitude 30,000 ft
Weight 100 lbs, core system. Does not include cart or monitor
Chassis Size 22″ D x 17.5″ W x 14″ H

Note: Specifications are subject to change without notice.

The GENASYS Semi TS-900 PXI Semiconductor Test System is an integrated test platform that offers comparable system features and capabilities found in proprietary ATE systems. Available as a bench top, with an integrated cart, or with an integrated manipulator, the TS-900 takes full advantage of the PXI architecture to achieve a cost-effective and full-featured test solution for device, SoC and SiP test applications. The test system incorporates a custom-designed, performance test interface that supports the use of PCB DUT (Device Under Test) boards – a proven and high-performance method for interfacing to the device under test. Additionally, the receiver interface’s pin blocks are field configurable, allowing users to upgrade the receiver when they modify or upgrade the system for new applications. The configuration of the receiver can support up to 512 dynamic digital channels, as well as a range of analog, power supply and RF resources.

The basic system includes 64, digital I/O channels; 64 static digital I/O channels; a programmable user power supply; a system self-test and fixture; DIOEasy software for digital waveform editing / display, ICEasy – device test development tools, and Marvin Test Solutions’ ATEasy software which provides an integrated and complete test executive and test development environment, allowing users to quickly develop and easily maintain test applications. With an additional 14 PXI slots available for adding more digital or analog test resources as needed, the TS-900 is the ideal test solution for semiconductor OEMs, fabless semiconductor vendors, incoming inspection / counterfeit detection labs and packaging / test vendors needing a low cost, configurable test system.

For production test applications requiring integration with an automated handler, the TS-900 is available with the Reid – Ashman OM1069 manipulator which provides precise positioning of the test head and the flexibility to interface to automated probers and device handlers. The manipulator’s spring loaded design allows for easy alignment and docking to handlers – eliminating the need for a complex receiver interface. The TS-900M features a handler compatible slide receiver, which offers the flexibility to interface to virtually any device handler. In addition, fixture compatibility is maintained with the TS-900’s bench top receiver configuration, allowing users to interchange load boards between the screw down and slide receiver configurations.

Features

The TS-900 can be configured with up to 512 dynamic digital channels. The base TS-900 platform uses the GX5295 – a 3U PXI, 32 channel, 100 MHz digital I/O card with per channel PMUs. A wide range of digital and analog instrument options can easily be incorporated into the TS-900, offering users a compact test system that can support both functional and DC parametric test capabilities. And with the incorporation of an integral, modular test interface, the TS-900 offers users an application ready test system which can be upgraded or reconfigured in the field if needed. The system is also supplied with various software development and digital vector conversion tools, including support for ASCII, WGL, STIL, VCD and ATP vector formats.

TS-900 Core System Configuration

The basic TS-900 core system includes the following test resources and capabilities:

  • 20-slot, high-power (60 watts per slot) PXI chassis with integral receiver interface
  • Embedded Core 2 Duo controller with Windows 7
  • 64 100 MHz digital channels with per pin PMU (expandable to 512)
  • 64 static digital channels (expandable to 128), which can be used for fixture ID, UUT static control or DUT board relay control
  • Programmable, 4 channel +/- 20 V user power supply
  • System self-test fixture and test program
  • ATEasy test executive and programming environment
  • DIOEasy digital waveform editing and display tool
  • ICEasy test software development tools

Receiver Interface

The TS-900 platform employs a modular, pogo-pin style receiver interface which consists of various pin blocks and is field re-configurable. Interfacing to the device under test (DUT) is done via a device specific PCB which mates to the pogo pin interface and is held in position with an integral stiffener / hold-down assembly. The hold down assembly employs a screw down mechanism for bench top configurations or a slide receiver mechanism for interfacing to handlers. Both mechanisms employ the same stiffener assembly, allowing users to interchange PCB load boards between the two types of mechanisms.

For digital interfacing, the receiver employs dual, 68-pin block assemblies which connect directly to the TS-900’s PXI digital instrument resources, providing a high performance, controlled impedance interface. For user power connections, a power block is available which supports up to (4) user power suppliers and for general purpose analog and switching applications, a 78 pin block assembly with mating D-sub connector is available. RF and coaxial connections can be accommodated via an 8 connector, SMA block or blind-mate RF connector blocks. All receiver block positions are interchangeable, offering a high degree of flexibility.

TS-900ReceiverInterface

System Self-Test

The TS-900 is supplied with a system self test which includes an interactive self-test software procedure as well as a self-test PCB which interfaces to the receiver. The self-test is an ATEasy based test program and verifies functional integrity of the system and resource connections to the test system interface.

TS-900SelfTestFixture

Software

The TS-900 is supplied with ATEasy, Marvin Test Solutions’ test development and test executive software suite; DIOEasy – a comprehensive digital test tool set for developing, debugging and importing digital test vectors; ICEasy – a library of device test development tools; and all necessary instrument drivers which are compatible with variety of application development environments including ATEasy, LabWindows, LabVIEW, Microsoft Visual Studio languages and more.

The TS-900 ATEasy work space is provided with a pre-configured ATEasy System file and associated instrument drivers. It also provides access to DIOEasy and ICEasy tools, which provide the following capabilities:

  • Pin and pin group mapping
  • Virtual instrument drivers – providing digital subsystem and instrument independent test programs
  • IV Curve plotting tool
  • Shmoo plot tool
  • Pre-defined parametric and functional tests
  • Self test source code
  • Predefined test examples
  • Import tools supporting WGL, STIL, VCD and EVCD file formats using the optional DIOEasy-FIT option

Automated DC Parametric Test Creation
ICEasy’s library includes a full set of test capabilities for characterizing a device’s input and output DC characteristics. Utilizing the TS-900’s PMU per pin capabilities, users are able to quickly create test programs for the following types of tests:

  • Open and Shorts
  • Input Leakage (IIL, IIH)
  • Input Voltage Threshold (VIH, VIL)
  • Output Short Circuit (IOSH, IOSL)
  • Output Voltage Threshold (VOH, VOL)
  • Power Consumption (IDD, IDDQ)

These preconfigured tests, when combined ICEasy’s Device Pin and Pin group mapping capability provides the user with a simple and streamlined method to assign tests to specific device pins as well as specifying pass / fail limits for each test, without having to do low-level instrument setup and control. The result is faster test creation and faster time to test.

I-V Curve Tool
ICEasy’s Current – Voltage (I-V) curve tool offers users the ability to graphically plot the I-V characteristics of a device’s ESD diodes. This test method can provide insight into device failure mechanisms that can affect a device’s I/O pins, such as electrical overstress (EOS), electrostatic discharge (ESD), bond wire problems, and packaging problems. And more recently, the use of I-V curve plots as an “impedance signature” may be useful in identifying counterfeit devices where the impedance or I-V signature of a known genuine part is compared to a suspect part.

ICEasy’s I-V curve tools allows users to easily setup voltage & current ranges and step increments as well as defining by name, the specific pin (or pins) to be tested. Additionally, all I/O pins can be plotted on the same graph, providing an easy way to compare all device I-V curves. (see figure below) The plotted data can also be easily exported via the TS-900’s test executive (ATEasy). The ability to easily measure I-V characteristics and plot the results is a key feature for failure analysis and design verification applications.

TS-900-I-V-Curve_s

Shmoo Plot Tool
ICEasy’s Shmoo plot tool allows users to easily vary test parameters on both the X and Y axis without programming – allowing test engineers to visually observe the pass / fail operating ranges of the device under test. An accepted test methodology for device characterization and qualification, the addition of the Shmoo plot feature to the TS-900 platform provides users with a powerful technique for design verification and early production test qualification. Supporting both automated and interactive control, ICEasy’s Shmoo tool allows users to change parameters on the fly or to control the test via the TS-900’s test manager (ATEasy) as well as logging the resulting data.

TS-900-Shmoo_s

Configuration Options

TS-900CartTS-900M

Applications

  • Design verification for devices and modules
  • Pilot production and focused production test
  • Automated failure analysis and test
  • Counterfeit device detection

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TS-900 Series

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