GX3232 Series Specifications
Analog Inputs | |
---|---|
Input Channels | 32 single-ended or 16 differential (software configurable) 16 single-ended or 8 differential (60 V input option), the remaining 16 inputs are available for low voltage measurement |
Input Voltage Ranges | ยฑ10 V, ยฑ5 V, ยฑ2.5 V FS ยฑ60 V, ยฑ30 V, ยฑ15 V FS (60 V input option) |
Input Impedence | 2 Mฮฉ, differential 1 Mฮฉ to ground, single-ended 180 Kฮฉ ยฑ 20 Kฮฉ to ground, single-ended for 60 V input option |
Bias Current | 80 nA (max) |
Common Mode Rejection | 60 dB typical, DC โ 60 Hz, differential input mode. 30 dB for 60 V input option |
Common Mode Range | ยฑ10 V, differential input configuration ยฑ60 V, 60 V input option |
Overvoltage Protection | ยฑ30 V with power applied, ยฑ15 V with power removed ยฑ70 V (60 V input option) |
Full Scale DC Accuracy | ยฑ4.2 mV, 10 V range ยฑ2.8 mV, 5 V range ยฑ2.0 mV, 2.5 V range ยฑ6% of range, 60 V, 30 V & 15 V ranges |
Crosstalk Rejection | 80 dB, DC โ 10 kHz |
Integral Nonlinearity | ยฑ0.003% of FSR (max) |
Differential Nonlinearity | ยฑ0.0015% of FSR (max) |
A to D Converter | |
Resolution | 16 bits |
Maximum Conversion Rate | 300 kS/s |
Channels per Scan | 2, 4, 8, 16, or 32 per scan |
Maximum Scan Rate | 75 kS/s in multiple channel mode 150 kS/s in 2 channel mode 300 kS/s in single-channel mode |
Minimum Scan Rate | 400 scans per second (single-rate generator) 0.0075 scans per second (two-rate generators) |
Scanning Modes | Single scan, Continuous scan, Selftest, Multiple channel, Single channel, Two channel |
Clock Source | 24 MHz oscillator, two 16 dividers (independent or cascadable) |
Memory | 32 K sample FIFO |
Analog Output Channels | |
---|---|
Configuration | Four single-ended |
Output Range | ยฑ10 V, ยฑ5 V, ยฑ2.5 V FS (software configurable) |
Output Impedence | 1 ฮฉ (max) |
Output Current | ยฑ3 mA (max) |
Full Scale DC Accuracy | ยฑ3.0 mV, 10 V range ยฑ2.2 mV, 5 V range ยฑ1.7 mV, 2.5 V range (no load) |
Settling Time | 8 ยตs to on LSB, typical with 50% full scale step |
Integral Nonlinearity | ยฑ0.004% of FSR (max) |
Differential Nonlinearity | ยฑ0.0015% pf FSR (max) |
D to A Converter | |
Resolution | 16 bits |
Sampling Rate | 400 S/s to 300 kS/s using internal-rate generator DC to 300 kS/s with hardware or software sync |
Clock Source | Internal (programmable), software, external sync |
Internal Clock | 3 to 1 MHz sample rate, 24 bit divider from master clock frequency |
Clocking Modes | Continuous, triggered burst |
Memory | 32 K sample FIFO |
Digital Input/Output | |
Configuration | 16 TTL I/O lines organized as two bytes, configurable as inputs or outputs |
Output Drive | 8 mA, source or sink |
Control | Register read/write |
General | |
Mating I/O Connector | 68 pin, dual-ribbon socket Robinson Nugent P50E-068-S-TG or equivalent |
Current Consumption | +5 V @ 1.4 A (max) |
Size | 3U, single slot |
Temperature Operating | 0 ยฐC to +70 ยฐC |
Storage | -40 ยฐC to +85 ยฐC |
Humidity (Non-Condensing) | 0% to 95% (operating) |
Note: Specifications are subject to change without notice.