Features
- Generation of any frequency from DC to 1/2 reference clock oscillator in milliHertz tuning steps (32 bit digital resolution)!
- Agile relative phase control using up to 16 programmable phase registers per channel, 12-bit phase resolution. Pipeline delay of only 3 reference clock cycles.
- Agile, phase coherent, “zero-time” frequency switching using 16 independent frequency registers.
- Agile pulsed RF output, 10 ns resolution (100 MHz models).
- Easy tuning of frequency outputs.
- Greater immunity to parameter drift due to temperature.
- Timing resolution of 10 ns at a 100 MHz master clock (NOTE: Timing resolution of
- 2.5 ns is available on non-DDS, TTL-only PulseBlasterESR boards operating up to 400 MHz).
- 10 to 24 independent output bits.
- Simple instruction set.
- Memory space for up to 32k program words (VLIW, 80-bit wide).
- External hardware and software triggering.
- Multi-board synchronization
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