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syn1588® VIP

  • Technology-independent synchronous design for versatile FPGA and ASIC implementation.
  • Supports three Ethernet PHY devices for enhanced connectivity options.
  • Dual firmware management with the ability to revert to a golden firmware for flexibility.
  • USB-powered evaluation board with comprehensive accessory package.
  • Option to obtain the board schematic upon request for reference.
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syn1588® VIP – Key System Features

  • A single-chip IEEE1588 solution
  • Exceptional clock accuracy, surpassing 8 nanoseconds
  • Well-suited for integration into your FPGA/ASIC or board design as an embedded system solution
  • Harnesses IEEE1588 hardware timestamping supported by syn1588® technology
  • Utilizes Oregano Systems’ patented 1-step timestamping technology
  • Offers versatile generation of programmable frequencies, 1 PPS signals, pseudo GPS data streams, IRIG-B, low-jitter frequencies spanning from millihertz to megahertz, and analog video sync signals
  • Capable of both PTP master and slave operation
  • Enables synchronization in PTP master mode to an absolute time reference
  • Equipped with an onboard GPS receiver
  • Facilitates remote management and configuration through IEEE1588 management messages
  • Offers the flexibility of user-selectable Ethernet network interface types, including a standard copper interface (RJ45) and a fiber interface (SFP)
  • Supports non-volatile storage of configurations in an external SPI flash
  • Features remote firmware update capability for hassle-free maintenance and updates

The purpose of the syn1588® VIP EvaluThe purpose of the syn1588® VIP Evaluation Board is to serve as a testing platform for validating the syn1588® technology, encompassing both the IP core/hardware and software componentsation Board is to serve as a testing platform for validating the syn1588® technology, encompassing both the IP core/hardware and software components within an embedded environment. Given the inherent constraints of embedded systems, such as limited memory and computing resources, this evaluation board is capable of supporting a single PTP profile per firmware version. It showcases the implementation of a PTP node in a bare-metal configuration, operating without an operating system and relying on a lightweight IP stack.

The syn1588® VIP essentially functions akin to a GPS receiver, but it does not require an external antenna. It offers a 1 PPS pulse and a NMEA-compatible data stream through the serial interface, albeit without positional data. When operating in PTP master mode, the syn1588® VIP can accept GPS data input from an onboard GPS receiver or utilize a fiber network interface. Furthermore, it caters to the needs of the audio/video broadcast community by providing video sync generation capabilities. In essence, the syn1588® VIP Evaluation Board Revision 3 can serve as a straightforward synchronization device. By connecting it to the network, users can receive a precisely synchronized sync signal.

syn1588® VIP – Technical Details Technical Features – IP Core

  • Employs a technology-independent synchronous design
  • Adaptable for implementation on various FPGA or ASIC technologies
  • Supports three Ethernet PHY devices
  • Incorporates dual firmware management, comprising a golden firmware and user firmware
  • Includes a “revert to golden firmware” function for added flexibility

Technical Features – Evaluation Board

  • USB-powered (USB 3.0 is only required for power supply)
  • Package includes:
    • Universal USB power supply
    • SFP fiber transceiver module (offering both short-range and long-range options)
    • Micro USB cable
    • Oregano Systems Powerbank
    • Oregano Systems USB Stick
    • Quality inspection document
    • Active GPS antenna
  • The board schematic is available upon request for reference.


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syn1588® VIP

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